1 lt1949 600khz, 1a switch pwm dc/dc converter v in v in 3.3v sw fb lt1949 l1 10 h d1 r2140k 68k 330pf v out 10v175ma r1 1m 1949 f01 c210 f ceramic c122 f v c gnd shdn shutdown c1: avx taja226m006rc2: taiyo yuden lmk325bj106mn d1: mbrm120lt3 l1: sumida cdrh62b-100 + the lt ? 1949 is a fixed frequency step-up dc/dc con- verter with a 1a, 0.5 w internal switch. capable of gener- ating 10v at 175ma from a 3.3v input, the lt1949 is idealfor generating bias voltages for large screen lcd panels. constant frequency 600khz operation results in a low noise output that is easy to filter and the 30v switch rating allows output voltage up to 28v using a single inductor. an external compensation pin gives the user flexibility in optimizing loop compensation, allowing small low esr ceramic capacitors to be used at the output. the 8-lead msop and so packages ensure a low profile overall solution. the lt1949 includes a low-battery detector that stays alive when the device goes into shutdown. quiescent current in shutdown is 25 m a, while operating current is 4.5ma. 1a, 0.5 w , 30v internal switch operates with v in as low as 1.5v 600khz fixed frequency operation low-battery detector stays active in shutdown low v cesat switch: 410mv at 800ma pin-for-pin compatible with the lt1317b small 8-lead msop and so packages lcd bias supplies gps receivers battery backup portable electronic equipment diagnostic medical instrumentation , ltc and lt are registered trademarks of linear technology corporation. figure 1. 3.3v to 10v/175ma dc/dc converter figure 2. 3.3v to 10v converter efficiency load current (ma) 9080 70 60 50 40 30 20 5 100 50 300 1949 f02 10 efficiency (%) v out = 10v 3v in 3.6v in 4.2v in descriptio u features applicatio s u typical applicatio u downloaded from: http:///
2 lt1949 v in , lbo voltage ..................................................... 12v sw voltage ............................................... C 0.4v to 30v fb voltage .................................................... v in + 0.3v v c voltage ................................................................ 2v lbi voltage ............................................ 0v v lbi 1v shdn voltage ........................................................... 6v (note 1) lt1949ems8 ltjc consult factory for military grade parts. 12 3 4 v c fb shdn gnd 87 6 5 lbolbi v in sw top view ms8 package 8-lead plastic msop t jmax = 125 c, q ja = 120 c/w junction temperature .......................................... 125 c operating temperature range (note 2) lt1949ems8 .......................................C40 c to 85 c lt1949es8/lt1949is8 .......................C40 c to 85 c storage temperature ........................... C 65 c to 150 c lead temperature (soldering, 10sec).................. 300 c order part number lt1949es8lt1949is8 s8 part marking 1949e1949i 12 3 4 87 6 5 top view lbolbi v in sw v c fb shdn gnd s8 package 8-lead plastic so t jmax = 125 c, q ja = 120 c/w order part number ms8 part marking the denotes specifications which apply over the full operating temperature range, otherwise specifications are t a = 25 c. v in = 2v, v shdn = 2v unless otherwise noted. symbol parameter conditions min typ max units i q quiescent current 4.5 7.5 ma v shdn = 0v 25 40 m a v fb feedback voltage 1.22 1.24 1.26 v 1.20 1.24 1.26 v i b fb pin bias current (note 3) 12 80 na input voltage range 1.7 12 v g m error amp transconductance d i = 5 m a 70 140 240 m mhos a v error amp voltage gain 700 v/v maximum duty cycle 80 85 % switch current limit (note 4) v in = 2.5v, duty cycle = 30% 1 1.13 1.5 a v in = 2.5v, duty cycle = 30% 0.95 1.5 a f osc switching frequency 500 600 750 khz shutdown pin current v shdn = v in 0.015 0.1 m a v shdn = 0v C 2.3 C 7 m a lbi threshold voltage 190 200 210 mv 180 200 220 mv lbo output low i sink = 10 m a 0.15 0.25 v lbo leakage current v lbi = 250mv, v lbo = 5v 0.02 0.1 m a lbi input bias current (note 5) v lbi = 150mv 56 0n a low-battery detector gain 1m w pull-up 2000 v/v switch leakage current v sw = 5v 0.01 3 m a package/order i for atio uu w absolute axi u rati gs w ww u electrical characteristics downloaded from: http:///
3 lt1949 typical perfor a ce characteristics uw input voltage 0 oscillator frequency (khz) 700650 600 550 500 2468 1949 g01 10 12 25 c C40 c 85 c oscillator frequency switch current limit,duty cycle = 30% switch current limit temperature ( c) C50 switch current (a) 1.31.2 1.1 1.0 0.9 0.8 C25 02 55 0 1949 g03 75 100 switch voltage drop (v cesat ) feedback voltage temperature ( c) C50 feedback voltage (v) 1.251.24 1.23 1.22 1.21 1.20 C25 0 25 50 1949 g05 75 100 quiescent current, shdn = 2v temperature ( c) C50 C25 quiescent current (ma) 1949 g06 4.64.5 4.4 4.3 4.2 4.1 4.0 3.9 3.8 0 255075100 switch current (a) 0 switch voltage (v) 1.00.8 0.6 0.4 0.2 0 0.2 0.4 0.6 0.8 1949 g04 1.0 1.2 85 c C40 c 25 c note 3: bias current flows into fb pin. note 4: switch current limit guaranteed by design and/or correlation to static tests. duty cycle affects current limit due to ramp generator.note 5: bias current flows out of lbi pin. note 1: absolute maximum ratings are those values beyond which the life of a device may be impaired.note 2: the lt1949e is guaranteed to meet performance specifications from 0 c to 70 c. specifications over the C 40 c to 85 c operating temperature range are assured by design, characterization and correlationwith statistical process controls. the denotes specifications which apply over the full operating temperature range, otherwise specifications are t a = 25 c. v in = 2v, v shdn = 2v unless otherwise noted. symbol parameter conditions min typ max units switch v cesat i sw = 800ma 410 mv i sw = 500ma 400 mv reference line regulation 1.8v v in 12v 0.08 0.15 %/v shdn input voltage high 1.4 6 v shdn input voltage low 0.4 v electrical characteristics duty cycle (%) 0 switch current (a) 1.31.2 1.1 1.0 0.9 0.8 80 1949 g02 20 40 60 100 downloaded from: http:///
4 lt1949 v c (pin 1): compensation pin for error amplifier. con- nect a series rc network from this pin to ground. typicalvalues for compensation are a 68k/330pf combination when using ceramic output capacitors. minimize trace area at v c . fb (pin 2): feedback pin. reference voltage is 1.24v. connect resistor divider tap here. minimize trace area atfb. set v out according to: v out = 1.24v(1 + r1/r2). shdn (pin 3): shutdown. pull this pin low for shutdown mode (only the low-battery detector remains active).leave this pin floating or tie to a voltage between 1.4v and 6v to enable the device. shdn pin is logic level and need only meet the logic specification (1.4v for high, 0.4v for low). gnd (pin 4): ground. connect directly to local ground plane.sw (pin 5): switch pin. connect inductor/diode here. minimize trace area at this pin to keep emi down.v in (pin 6): supply pin. must be bypassed close to the pin.lbi (pin 7): low-battery detector input. 200mv refer- ence. voltage on lbi must stay between ground and700mv. low-battery detector remains active in shutdown mode. lbo (pin 8): low-battery detector output. open collec- tor, can sink 10 m a. a 1m w pull-up is recommended. typical perfor a ce characteristics uw load regulation v out 50mv/div dc coupled offset added i load 25ma/div v in = 3v v out = 10v l1 = 10 m h, sumida cd54 c out = 10 m f ceramic 1949 g10 load regulation v out 50mv/div dc coupled offset added i load 50ma/div v in = 4v v out = 10v l1 = 10 m h, sumida cd54 c out = 10 m f ceramic 1949 g11 transient response v out 100mv/div ac coupled 50 m s/div v in = 3.3v v out = 10v circuit of figure 1 1949 g12 i l 500ma/div 200ma100ma i load temperature ( c) C50 quiescent current ( a) 2625 24 23 22 21 20 C25 0 25 50 1317 tpc10 75 100 temperature ( c) C50 C25 0 25 50 75 100 fb pin bias current (na) 1317 tpc11 4036 32 28 24 20 16 12 84 0 quiescent current, shdn = 0v fb pin bias current shdn pin current shdn pin voltage (v) 0 shdn pin current ( a) 3 5 1317 tpc12 12 4 21 0 C1C2 C3 6 uu u pi fu ctio s downloaded from: http:///
5 lt1949 C + C + C + C + C + ++ s ramp generator 1.24v reference r bias v c g m fb enable 200mv a = 2 ff a1comparator a2comparator error amplifier a4 0.06 w driver sw gnd 1949 bd q3 q s 600khz oscillator 5 lbo lbi shdn shutdown 3 7 1 4 r1(external) v out 8 r2(external) fb 2 figure 3. lt1949 block diagram the lt1949 is a current mode, fixed frequency step-updc/dc converter with an internal 1a npn power transis- tor. operation can best be understood by referring to the block diagram. at the beginning of each oscillator cycle, the flip-flop is set and the switch is turned on. current in the switch ramps up until the voltage at a2s positive input reaches the v c pin voltage, causing a2s output to change state and theswitch to be turned off. the signal at a2s positive input is a summation of a signal representing switch current and a ramp generator (introduced to avoid subharmonic oscil- lations at duty factors greater than 50%). if the load increases, v out (and fb) will drop slightly and the error amplifier will drive v c to a higher voltage, causing current in the switch to increase. in this way, the error amplifierdrives the v c pin to the voltage necessary to satisfy the load. frequency compensation is provided by an externalseries rc network connected between the v c pin and ground. layout hintsthe lt1949 switches current at high speed, mandating careful attention to layout for proper performance. you will not get advertised performance with careless layouts. figure 4 shows recommended component placement fora boost (step-up) converter. follow this closely in your pc layout. note the direct path of the switching loops. input capacitor c1 must be placed close (< 5mm) to the ic package. as little as 10mm of wire or pc trace from c in to v in will cause problems such as inability to regulate or oscillation.the ground terminal of output capacitor c2 should tie close to pin 4 of the lt1949. doing this reduces di/dt in the ground copper which keeps high frequency spikes to a minimum. the dc/dc converter ground should tie to the pc board ground plane at one place only, to avoid intro- ducing di/dt in the ground plane. block diagra w operatio u downloaded from: http:///
6 lt1949 applicatio n s i n for m atio n wu u u low-battery detectorthe lt1949s low-battery detector is a simple pnp input gain stage with an open collector npn output. the nega- tive input of the gain stage is tied internally to a 200mv 5% reference. the positive input is the lbi pin. arrange- ment as a low-battery detector is straightforward. figure? 5 details hookup. r1 and r2 need only be low enough in value so that the bias current of the lbi pin doesnt cause large errors. for r2, 100k is adequate. the 200mv reference can also be accessed as shown in figure? 6. the low-battery detector remains active in shutdown. 12 87 34 65 l1 c2 lbo lbi lt1949 v out v in gnd shutdown r1 r2 multiple vias ground plane 1949 f04 c1 + figure 4. recommended component placement for boostconverter. note direct high current paths using wide pc traces. minimize trace area at pin 1 (v c ) and pin 2 (fb). use multiple vias to tie pin 4 copper to ground plane. usevias at one location only to avoid introducing switching currents into the ground plane lbo lbi to processor r1 1m r2100k v in lt1949 1949 f05 3.3v gnd 200mvinternal reference C + r1 = v lb C 200mv 2 m a figure 5. setting low-battery detector trip point v in lt1949 lbi lbo 200k 10 m f gnd 10k 1949 f06 2n3906 v ref 200mv + figure 6. accessing 200mv reference operatio u downloaded from: http:///
7 lt1949 dimensions in inches (millimeters) unless otherwise noted. ms8 package 8-lead plastic msop (ltc dwg # 05-08-1660) s8 package 8-lead plastic small outline (narrow 0.150) (ltc dwg # 05-08-1610) information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no represen-tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. u package descriptio msop (ms8) 1098 * dimension does not include mold flash, protrusions or gate burrs. mold flash, protrusions or gate burrs shall not exceed 0.006" (0.152mm) per side ** dimension does not include interlead flash or protrusions. interlead flash or protrusions shall not exceed 0.006" (0.152mm) per side 0.021 0.006 (0.53 0.015) 0 C 6 typ seating plane 0.007 (0.18) 0.040 0.006 (1.02 0.15) 0.012 (0.30) ref 0.006 0.004 (0.15 0.102) 0.034 0.004 (0.86 0.102) 0.0256 (0.65) bsc 12 3 4 0.193 0.006 (4.90 0.15) 8 7 6 5 0.118 0.004* (3.00 0.102) 0.118 0.004** (3.00 0.102) 0.016 C 0.050 (0.406 C 1.270) 0.010 C 0.020 (0.254 C 0.508) 45 0 C 8 typ 0.008 C 0.010 (0.203 C 0.254) so8 1298 0.053 C 0.069 (1.346 C 1.752) 0.014 C 0.019 (0.355 C 0.483) typ 0.004 C 0.010 (0.101 C 0.254) 0.050 (1.270) bsc 1 2 3 4 0.150 C 0.157** (3.810 C 3.988) 8 7 6 5 0.189 C 0.197* (4.801 C 5.004) 0.228 C 0.244 (5.791 C 6.197) dimension does not include mold flash. mold flash shall not exceed 0.006" (0.152mm) per side dimension does not include interlead flash. interlead flash shall not exceed 0.010" (0.254mm) per side * ** v in v in 4v to 9v sw fb lt1949 l1 10 h l210 h d1 33k 1m 3.3nf c2 4.7 f 16v v out 5v250ma 1949 ta02 c310 f 6.3v c14.7 f 16v v c gnd shdn c1, c2: taiyo yuden emk316bj475mlc3: taiyo yuden jmk316bj106ml d1: motorola mbrm120lt3 l1, l2: sumida cr32-100kc 1m 1m1% 332k1% 4 cell to 5v sepic converter typical applicatio u downloaded from: http:///
8 lt1949 ? linear technology corporation 1999 1949f lt/tp 0300 4k ? printed in the usa linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear-tech.com part number description comments lt1054 high power regulated charge pump up to 100ma output with no inductors lt1302 high output current micropower dc/dc converter 5v/600ma from 2v, 2a internal switch, 200 m a i q lt1304 2-cell micropower dc/dc converter low-battery detector active in shutdown lt1307b single cell micropower 600khz pwm dc/dc converter 3.3v at 75ma from 1 cell, msop package lt1308b 2a 600khz pwm dc/dc converter tssop package lt1317b micropower, 600khz pwm dc/dc converter 2 cells to 3.3v at 200ma, msop package ltc ? 1516 2-cell to 5v regulated charge pump 12 m a i q , no inductors, 5v at 50ma from 3v input lt1613 single cell 1.4mhz pwm dc/dc converter 3.3v to 5v at 200ma, sot-23 package ltc1682 doubler charge pump with low noise linear regulator 3.3v and 5v outputs with 60 m v rms noise, up to 80ma output ltc1754 micropower 3.3v/5v charge pump with shutdown up to 50ma output, i q = 13 m a, sot-23 package related parts v in v in 3.3v sw fb lt1949 l1 10 h d7 r37.5k 1% r240.2k 1% r147k 1949 ta01 c210 f c70.1 f c80.1 f c90.1 f c44.7 f c54.7 f c122 f c3680pf d5 d1 d2 C8v 10ma 8v200ma 23v5ma d6 c6 4.7 f v c gnd shdn shutdown lbilb0 c1: avx tajb226m010c2: taiyo yuden tmk432bj106mn x7r 1210 c4, c5, c6: taiyo yuden lmk316bj475ml x5r1206 c7, c8, c9: 0.1 f ceramic, 50v d1 to d6: fmmd7000, dual dioded7: mbrm120lt3 l1: sumida cdrh62b-100 + d3 d4 low profile triple output lcd bias generator typical applicatio u downloaded from: http:///
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